Bangalore
June 25, 2020
•Bachelor or Master or Ph.D. in Electronics Engineering and specialization in VLSI domain.
• Hands on experience in SoC & IP level static & dynamic power analysis, noise & EM analysis and defining analog / digital interface requirements
• Proven experience in delivering full chip EM & IR closure methodology of mixed signal SoC with high speed PHYs, IOs, PMU IP etc. closing analog / digital interfaces timing & signal integrity issues
• Experience in Synopsys ICC flow, Cadence tools, low geometry node issues, working with EDA team in reviewing & resolving blocking issues in project
• Experience in customizing flows & methodology to meet low power & area objectives of SoC and leading team to execute on time
• Ability to use scripting languages / automation of EM & IR analysis methodology creation and deployment
• Should have proven experience in demonstrating strong technical leadership to deliver on commitment, anticipation of challenges, assertive communication and excellent team player.
• Excellent communication skills with proven experience in international relationships
Interested candidate may send their updated resume to madhuri.tomar@incise.in OR reply back to sender email along with the following information. Immediate joiners are most welcome.
Notice Period (How soon you can join us?):
Current CTC:
Expected CTC:
Open for Bangalore Location:
Can you join us in 30 Days if required (Yes/No):
Reason for Job change:
Role - R&D Executive
Industry Type - IT-Software, Software Services
Functional Area - Engineering Design, R&D
Employment Type - Full Time, Permanent
Role Category - R&D
Education:
UG :Any Graduate in Any Specialization, Graduation Not Required
PG :Post Graduation Not Required, Any Postgraduate in Any Specialization
Doctorate :Doctorate Not Required, Any Doctorate in Any Specialization
Offered Pay Amount
Pay Amount : Rs. 1000000.00Industry
ITnumber of openings :
1Qualification :
EMIR Sign off, Extraction Sign-offJob Location